Diff mode

runner: ariselab-64c-docker
baseline: llvm/llvm-project@d9a192c
patch: llvm/llvm-project#155087
sha256: 9a94045bebba5773accd455c5da2de81f9d057af56b07fa002139c068dd61ffa
commit: bd4f32b

4 files changed, 645 insertions(+), 646 deletions(-)

Improvements:
  simplifycfg.NumFoldValueComparisonIntoPredecessors 519925 -> 519928 +0.00%
  licm.NumSunk 276407 -> 276408 +0.00%
  jump-threading.NumFolds 2638016 -> 2638020 +0.00%
  instsimplify.NumSimplified 2527590 -> 2527593 +0.00%
  gvn.NumGVNSimpl 4562365 -> 4562370 +0.00%
  memdep.NumCacheNonLocalPtr 275174660 -> 275174671 +0.00%
  memdep.NumUncacheNonLocalPtr 260150903 -> 260150913 +0.00%
Regressions:
  correlated-value-propagation.NumPhis 1285899 -> 1285896 -0.00%
  lcssa.NumLCSSA 15577968 -> 15577944 -0.00%
  instcombine.NumSunkInst 3465722 -> 3465721 -0.00%
  instcombine.NumCombined 124813121 -> 124813105 -0.00%
  instcombine.NumDeadInst 42246864 -> 42246860 -0.00%

36 32 bench/pola-rs/optimized/91ojamjedp83lpe0pc0cw0okj.ll
38 34 bench/quinn-rs/optimized/aa0f6okxl6jzwxndw38ja55fd.ll
101 110 bench/typst-rs/optimized/2i78fvbm4wocuesi.ll

The provided diff modifies several LLVM IR files across different Rust benchmarks (pola-rs, quinn-rs, typst-rs), primarily involving control flow and exception handling optimizations. Here are the major changes:

1. Replacement of conditional branches with switch instructions: In multiple functions (e.g., in pola-rs and quinn-rs), sequences of and, icmp, and br instructions are replaced with switch statements. For example, a pattern checking (x & 1) == 0 is replaced with a switch on values 0 and 2 that both jump to the same destination. This improves clarity and enables better optimization opportunities.

2. Refactoring of landing pad and resume logic: In several pola-rs functions, the common.resume block is updated to have additional predecessors and uses multiple landingpad values in the PHI node. The %common.resume.op PHI now includes entries from %lpad.thr_comm and %lpad.thr_comm.split-lp, indicating improved exception handling path merging.

3. Introduction of early switch tests for control flow optimization: In quinn-rs, a new switch.early.test.i block is introduced to handle early exits based on %20 value, reducing redundant computations and streamlining control flow. This replaces a chain of icmp and select operations with a direct switch.

4. Loop exit and PHI node restructuring in typst-rs: Multiple loops (e.g., .preheader.i, .preheader3.i) are updated to use switch instead of and+icmp+br for iterator termination checks. PHI nodes in loop exits (e.g., %158, %128) now reference new blocks like .loopexit66, indicating loop transformation and better exit handling.

5. Corrected PHI node predecessor references and operand order: Several PHI nodes (e.g., %.sroa.0.0, %.sroa.029.0) are updated to reference new block labels (like .loopexit, .loopexit41) instead of original loop headers, reflecting updated control flow structure after loop optimizations or outlining.

These changes reflect optimizations in exception handling, control flow simplification via switch, and improved loop handling—likely resulting from updated inlining, cleanup of redundant conditions, or improved SROA and jump threading.

model: qwen-plus-latest
CompletionUsage(completion_tokens=516, prompt_tokens=22865, total_tokens=23381, completion_tokens_details=None, prompt_tokens_details=None)

/close